dma.c

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/*
 * kernel_drivers/adi_chips/dma.c
 *
 * Copyright (c) 2003-2004 Lukasz Dembinski <dembol@nasa.com.pl>
 * All Rights Reserved
 * 
 * Date:        2004/10
 * Author:      Lukasz Dembinski
 * Info:        dma.c core file
 * Contact:     mailto: <dembol@nasa.com.pl>
 *
 */
#include <agnix/agnix.h>
#include <agnix/adi/adi.h>
#include <agnix/spinlock.h>
#include <asm/types.h>
#include <agnix/ioport.h>
#include <agnix/memory.h>
#include <agnix/resources.h>
#include <agnix/console.h>

#define MOD_NAME        "DMA: "

u32 dma_resource_bitmap[1];

struct resource_s dma_resource = {
    .resource_name      = "DMA",
    .resource_bitmap    = dma_resource_bitmap,
    .resource_len       = 1,
    .resource_max       = DMA_MAX_CHANNEL
};

int dma_resource_desc;
u32 flags;

int dma_chip_init(struct chip_s *chip)
{
    if ((dma_resource_desc = register_resource(&dma_resource)) < 0)
    {
        printk(MOD_NAME "can not register dma resource\n");
        return -1;
    }    
    
    return 0;
}

int dma_chip_release(struct chip_s *chip)
{
    return 0;
}

int dma_request_channel(struct chip_s *chip, u8 dma_nr)
{
    return request_resource(dma_resource_desc, (int)dma_nr);
}

int dma_put_channel(struct chip_s *chip, u8 dma_nr)
{
    return put_free_resource(dma_resource_desc, (int)dma_nr);
}

int dma_enable(struct chip_s *chip, u8 dma_nr)
{
    if (dma_nr > 7)
        return -1;

    if (dma_nr < 4)
        outb(dma_nr, DMA1_REG_MASK);
    else
    if (dma_nr < 8)
        outb(dma_nr & 0x03, DMA2_REG_MASK);

    return 0;
}

int dma_disable(struct chip_s *chip, u8 dma_nr)
{
    if (dma_nr > 7)
        return -1;

    if (dma_nr < 4)
        outb(dma_nr | 0x04, DMA1_REG_MASK);
    else
    if (dma_nr < 8)
        outb((dma_nr & 0x03) | 0x04, DMA2_REG_MASK);

    return 0;
}

int dma_clear_ff(struct chip_s *chip, u8 dma_nr)
{
    if (dma_nr > 7)
        return -1;

    if (dma_nr < 4)
        outb(0x00, DMA1_REG_FF);
    else
    if (dma_nr < 8)
        outb(0x00, DMA2_REG_FF);

    return 0;
}

int dma_set_mode(struct chip_s *chip, u8 dma_nr, u8 mode)
{
    if (dma_nr > 7)
        return -1;

    if (dma_nr < 4)
        outb(dma_nr | mode, DMA1_REG_MODE);
    else
    if (dma_nr < 8)
        outb((dma_nr & 0x03) | mode, DMA2_REG_MODE);

    return 0;
}

int dma_set_addr(struct chip_s *chip, u8 dma_nr, u32 address)
{
    int shift = 0;
    u8 page = (u8)(address >> 16);
    u8 dma_page_addr;
    u8 dma_addr;

    switch(dma_nr) {
        case 0x00:
            dma_page_addr = DMA_PAGE_0;
            break;

        case 0x01:
            dma_page_addr = DMA_PAGE_1;
            break;

        case 0x02:
            dma_page_addr = DMA_PAGE_2;
            break;

        case 0x03:
            dma_page_addr = DMA_PAGE_3;
            break;

        case 0x05:
            dma_page_addr = DMA_PAGE_5;
            break;

        case 0x06:
            dma_page_addr = DMA_PAGE_6;
            break;

        case 0x07:
            dma_page_addr = DMA_PAGE_7;
            break;
            
        default:
            return -1;
    }

    if (dma_nr < 4) {
        dma_addr = ((dma_nr & 0x03) << 1);
    } else 
    if (dma_nr < 8) {
        page &= 0xfe;
        shift = 1;
        dma_addr = ((dma_nr & 0x03) << 2);
    } else
        return -1;

    outb(page, dma_page_addr);
    outb((address >> shift) & 0xff, dma_addr);
    outb((address >> (8 + shift)) & 0xff, dma_addr);    

    return 0;
}

int dma_set_count(struct chip_s *chip, u8 dma_nr, u16 count)
{
    int shift = 0;
    u8 dma_count_addr;
    
    count--;

    if (dma_nr < 4) {
        dma_count_addr = ((dma_nr & 0x03) << 1) + 1;
    } else 
    if (dma_nr < 8) {
        shift = 1;
        dma_count_addr = ((dma_nr & 0x03) << 2) + 1;
    } else
        return -1;

    outb((count >> shift) & 0xff, dma_count_addr);
    outb((count >> (8 + shift)) & 0xff, dma_count_addr);    
    
    return 0;
}

int dma_lock(struct chip_s *chip)
{
    spin_lock_irqsave(&chip->chip_lock, flags);
    
    return 0;
}

int dma_unlock(struct chip_s *chip)
{
    spin_unlock_irqrestore(&chip->chip_lock, flags);
    
    return 0;
}

struct chip_dma_ops_s   dma_internal_ops = 
{
    .dma_lock            = dma_lock,
    .dma_unlock          = dma_unlock,
    .dma_request_channel = dma_request_channel,
    .dma_put_channel     = dma_put_channel,
    .dma_enable          = dma_enable,
    .dma_disable         = dma_disable,
    .dma_clear_ff        = dma_clear_ff,
    .dma_set_addr        = dma_set_addr,
    .dma_set_mode        = dma_set_mode,
    .dma_set_count       = dma_set_count
};

struct chip_ops_s       dma_chip_ops = {
    .init               = dma_chip_init,
    .release            = dma_chip_release
};

struct chip_s           dma_chip = {
    .chip_name          = "dma",
    .chip_class         = CHIP_CLASS_DMA,
    .chip_vendor        = 0x8086,
    .chip_ops           = &dma_chip_ops,
    .chip_pm_ops        = NULL,
    .internal_ops       = &dma_internal_ops,
};

int __init dma_init(void)
{
    adi_register_chip(&dma_chip);

    return 0;    
}